{"id":69172,"date":"2023-08-29T14:00:11","date_gmt":"2023-08-29T12:00:11","guid":{"rendered":"https:\/\/botland.com.pl\/blog\/przewodnik-po-architekturze-risc-v\/"},"modified":"2026-04-08T11:07:26","modified_gmt":"2026-04-08T09:07:26","slug":"pruvodce-architekturou-risc-v","status":"publish","type":"post","link":"https:\/\/botland.cz\/blog\/pruvodce-architekturou-risc-v\/","title":{"rendered":"Pr\u016fvodce architekturou RISC-V"},"content":{"rendered":"\u010cas \u010dten\u00ed:<\/span> 5<\/span> min.<\/span><\/span>\t\t
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V dne\u0161n\u00edm dynamick\u00e9m a neust\u00e1le se vyv\u00edjej\u00edc\u00edm sv\u011bt\u011b technologi\u00ed hraje architektura<\/strong> procesoru<\/strong> kl\u00ed\u010dovou roli. Je z\u00e1kladem ka\u017ed\u00e9ho elektronick\u00e9ho za\u0159\u00edzen\u00ed a umo\u017e\u0148uje n\u00e1m pou\u017e\u00edvat pokro\u010dil\u00e9 aplikace, prov\u00e1d\u011bt slo\u017eit\u00e9 v\u00fdpo\u010dty a komunikovat s digit\u00e1ln\u00edm prost\u0159ed\u00edm. Trh s procesory byl po mnoho let ovl\u00e1d\u00e1n technologick\u00fdmi velmocemi, a to x86<\/strong> a ARM<\/strong>. Tyto architektury se d\u00edky sv\u00fdm jedine\u010dn\u00fdm vlastnostem staly z\u00e1kladem dne\u0161n\u00edho trhu, tak\u017ee procesory s t\u011bmito typy jader dnes najdeme ve v\u011bt\u0161in\u011b za\u0159\u00edzen\u00ed. P\u0159esto se t\u00e9matu architektury s v\u011bt\u0161\u00edm \u010di men\u0161\u00edm \u00fasp\u011bchem chopili dal\u0161\u00ed v\u00fdrobci, kte\u0159\u00ed se sna\u017e\u00ed zaujmout konstrukt\u00e9ry elektronick\u00fdch za\u0159\u00edzen\u00ed vlastn\u00edm rozvojem tohoto t\u00e9matu.<\/p>\n

P\u0159\u00edkladem koncepce, kter\u00e9 se poda\u0159ilo proniknout na spot\u0159ebitelsk\u00fd trh, je RISC-V.<\/strong> Architektura se vyzna\u010duje p\u0159edev\u0161\u00edm otev\u0159enost\u00ed<\/strong> a flexibilitou<\/strong>. Rostouc\u00ed vliv RISC-V p\u0159edstavuje nejen potenci\u00e1ln\u00ed v\u00fdzvu pro dominantn\u00ed hr\u00e1\u010de na trhu, ale st\u00e1v\u00e1 se tak\u00e9 symbolem snahy o demokratizaci<\/strong> a otev\u0159enost<\/strong> technologi\u00ed<\/strong>. V tomto \u010dl\u00e1nku se bl\u00ed\u017ee pod\u00edv\u00e1me na architekturu RISC-V: jej\u00ed p\u016fvod, jedine\u010dn\u00e9 vlastnosti a v\u00fdhody, kter\u00e9 p\u0159itahuj\u00ed pozornost firem, v\u00fdzkumn\u00edk\u016f a technologick\u00fdch nad\u0161enc\u016f z cel\u00e9ho sv\u011bta.<\/p>\n\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t

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Dvojvl\u00e1d\u00ed v oblasti architektury<\/h2>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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Trh s architekturou procesor\u016f v pr\u016fb\u011bhu let ovl\u00e1dly dv\u011b mocn\u00e9 s\u00edly: ARM<\/strong> a x86<\/strong>. Architektura ARM, zalo\u017een\u00e1 na instruk\u010dn\u00ed sad\u011b RISC<\/strong> (Reduced Instruction Set Computer), se stala p\u0159edn\u00edm v\u00fdrobcem mobiln\u00edch za\u0159\u00edzen\u00ed a vestav\u011bn\u00fdch syst\u00e9m\u016f. D\u00edky n\u00edzk\u00e9 spot\u0159eb\u011b energie a \u00fa\u010dinnosti se pou\u017e\u00edv\u00e1 v smartphonech, tabletech a st\u00e1le rostouc\u00edm po\u010dtu za\u0159\u00edzen\u00ed internetu v\u011bc\u00ed. Na druh\u00e9 stran\u011b architektura x86, vyu\u017e\u00edvaj\u00edc\u00ed instrukce CISC<\/strong> (Complex Instruction Set Computer), si zajistila dominantn\u00ed postaven\u00ed v oblasti osobn\u00edch po\u010d\u00edta\u010d\u016f a server\u016f. Jeho v\u00fdpo\u010detn\u00ed v\u00fdkon a schopnost zvl\u00e1dat nejr\u016fzn\u011bj\u0161\u00ed \u00falohy p\u0159isp\u011bly k \u0161irok\u00e9mu uzn\u00e1n\u00ed v prost\u0159ed\u00edch n\u00e1ro\u010dn\u00fdch na v\u00fdkon.<\/p>\n\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t

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Przyk\u0142ad procesora x86.<\/figcaption>\n\t\t\t\t\t\t\t\t\t\t<\/figure>\n\t\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t
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\u010cipy zalo\u017een\u00e9 na j\u00e1drech ARM<\/strong> stanovily standard energetick\u00e9<\/strong> \u00fa\u010dinnosti<\/strong>, tak\u017ee jsou ide\u00e1ln\u00ed volbou pro p\u0159enosn\u00e1 za\u0159\u00edzen\u00ed, kde je d\u016fle\u017eit\u00e1 dlouh\u00e1 v\u00fddr\u017e baterie. Mnoho let v\u00fdvoje a \u010detn\u00e9 iterace umo\u017enily spole\u010dnosti Arm vytvo\u0159it jedine\u010dn\u00fd ekosyst\u00e9m,<\/strong> kter\u00fd podporuje jak mal\u00e9 mikrokontrol\u00e9ry, tak vysoce v\u00fdkonn\u00e9 procesory pro superpo\u010d\u00edta\u010de. Na druhou stranu si architektura x86<\/strong> z\u00edskala oblibu jako volba pro osobn\u00ed po\u010d\u00edta\u010de a servery a nab\u00edz\u00ed bohat\u00e9<\/strong> funkce<\/strong> a mo\u017enosti<\/strong> roz\u0161\u00ed\u0159en\u00ed<\/strong>. Jeho slo\u017eit\u00e1 struktura mu umo\u017e\u0148uje efektivn\u011b vykon\u00e1vat r\u016fzn\u00e9 \u00fakoly, co\u017e v\u0161ak m\u016f\u017ee v\u00e9st k vy\u0161\u0161\u00ed spot\u0159eb\u011b energie.<\/p>\n

Ob\u011b architektury nejsou bez vady<\/strong>. P\u0159esto\u017ee ARM dominuje v oblasti p\u0159enosn\u00fdch za\u0159\u00edzen\u00ed, m\u016f\u017ee se pot\u00fdkat s omezen\u00edmi v oblasti v\u00fdkonu, zejm\u00e9na v aplikac\u00edch n\u00e1ro\u010dn\u00fdch na v\u00fdpo\u010detn\u00ed v\u00fdkon. Naproti tomu x86 je sice univerz\u00e1ln\u00ed a v\u00fdkonn\u00fd, ale pro n\u011bkter\u00e9 aplikace m\u016f\u017ee b\u00fdt p\u0159\u00edli\u0161 slo\u017eit\u00fd, co\u017e p\u0159edstavuje probl\u00e9m z hlediska slo\u017eitosti procesu n\u00e1vrhu a n\u00e1sledn\u00fdch v\u00fdrobn\u00edch n\u00e1klad\u016f hotov\u00fdch za\u0159\u00edzen\u00ed.<\/p>\n

S t\u00edm, jak se m\u011bn\u00ed technologick\u00e9 prost\u0159ed\u00ed, vznik\u00e1 prostor pro nov\u00e9 iniciativy, jako je architektura RISC-V<\/strong>, kter\u00e1 se sna\u017e\u00ed p\u0159ekonat omezen\u00ed dominantn\u00edch hr\u00e1\u010d\u016f. To d\u00e1v\u00e1 nad\u011bji na nov\u00e9 p\u0159\u00edle\u017eitosti v architektu\u0159e procesor\u016f, prom\u011b\u0148uje trh a otev\u00edr\u00e1 dve\u0159e nov\u00fdm obzor\u016fm inovac\u00ed<\/strong>.<\/p>\n\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t

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Historick\u00fd p\u0159ehled RISC-V<\/h2>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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Prototypowy uk\u0142ad RISC-V z 2013 roku. (\u0179r\u00f3d\u0142o: https:\/\/en.wikipedia.org\/wiki\/RISC-V)<\/figcaption>\n\t\t\t\t\t\t\t\t\t\t<\/figure>\n\t\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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Na po\u010d\u00e1tku 80. let 20. stolet\u00ed. za\u010dala prosazovat my\u0161lenka procesor\u016f zalo\u017een\u00fdch na architektu\u0159e RISC<\/strong>. To znamenalo syst\u00e9my s maxim\u00e1ln\u011b sn\u00ed\u017een\u00fdm po\u010dtem spustiteln\u00fdch instrukc\u00ed. V t\u00e9 dob\u011b byly v prodejn\u00e1ch p\u0159edstaveny prvn\u00ed \u010dipy ARM a RISC-I a RISC-II. V n\u00e1sleduj\u00edc\u00edch letech se objevily tak\u00e9 koncepty RISC-III a RISC-IV, kter\u00e9 se vlastn\u011b vztahovaly k projekt\u016fm SOAR a SPUR. Dne\u0161n\u00ed protagonista, RISC-V<\/strong>, m\u00e1 s architekturami zm\u00edn\u011bn\u00fdmi p\u0159ed chv\u00edl\u00ed krom\u011b n\u00e1zvu jen m\u00e1lo spole\u010dn\u00e9ho. Jedinou podobnost\u00ed m\u016f\u017ee b\u00fdt to, \u017ee v\u0161echny tyto projekty byly zalo\u017eeny na modelu RISC<\/strong>.<\/p>\n

Architektura RISC-V<\/strong> je pom\u011brn\u011b mlad\u00fd koncept, proto\u017ee pr\u00e1ce na n\u00ed za\u010daly v roce 2010 na Kalifornsk\u00e9 univerzit\u011b v Berkeley pod veden\u00edm Davida Pattersona. Projekt byl financov\u00e1n spole\u010dnost\u00ed Microsoft a, co\u017e je zaj\u00edmav\u00e9, tak\u00e9 spole\u010dnost\u00ed Intel a v\u00fdsledkem v\u00fdzkumn\u00e9 pr\u00e1ce byl v n\u00e1sleduj\u00edc\u00edm roce prvn\u00ed<\/strong> \u010dip<\/strong> zalo\u017een\u00fd na RISC-V.<\/p>\n

P\u0159\u00edb\u011bh se zrychluje v roce 2014, kdy profesor Krste Asanovi\u0107 a Petterson publikuj\u00ed \u010dl\u00e1nek,<\/strong> ve kter\u00e9m tvrd\u00ed, \u017ee budoucnost pat\u0159\u00ed procesor\u016fm se zjednodu\u0161en\u00fdm seznamem instrukc\u00ed \u0161\u00ed\u0159en\u00fdm na b\u00e1zi open source. Publikace m\u011bla v technologick\u00e9m sv\u011bt\u011b zna\u010dn\u00fd ohlas a n\u00e1sledovalo zalo\u017een\u00ed nadace<\/strong> RISC-V<\/strong> , pozd\u011bji p\u0159ejmenovan\u00e9 na RISC-V International<\/strong>, 36 spole\u010dnostmi v\u010detn\u011b Nvidie, Googlu, IBM a Qualcommu.<\/p>\n\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t

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Zdarma? To je spravedliv\u00e1 cena<\/h2>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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Architektura RISC-V je dobr\u00fdm p\u0159\u00edkladem modelu open<\/strong> source<\/strong>. To znamen\u00e1, \u017ee tyto typy jader m\u016f\u017ee do jak\u00e9hokoli n\u00e1vrhu implementovat v podstat\u011b kdokoli. Jin\u00fdmi slovy, zdrojov\u00e9 k\u00f3dy a dokumentace RISC-V jsou ve\u0159ejn\u011b<\/strong> dostupn\u00e9, co\u017e umo\u017e\u0148uje navrhovat procesory optimalizovan\u00e9 pro konkr\u00e9tn\u00ed aplikace. Otev\u0159enost tak\u00e9 podporuje spolupr\u00e1ci, na dal\u0161\u00edch vylep\u0161en\u00edch architektury mohou pracovat v\u0161ichni v\u00fdvoj\u00e1\u0159i, mohou hl\u00e1sit chyby a spole\u010dn\u011b je opravovat, co\u017e p\u0159isp\u00edv\u00e1 k neust\u00e1l\u00e9mu v\u00fdvoji a zlep\u0161ov\u00e1n\u00ed projektu.<\/p>\n

Za zm\u00ednku stoj\u00ed tak\u00e9 to, \u017ee architektura Open RISC-V umo\u017e\u0148uje men\u0161\u00edm<\/strong> spole\u010dnostem<\/strong> a za\u010d\u00ednaj\u00edc\u00edm firm\u00e1m<\/strong> vstoupit na trh s procesory, co\u017e by d\u0159\u00edve mohlo b\u00fdt obt\u00ed\u017en\u00e9 kv\u016fli licen\u010dn\u00edm<\/strong> a n\u00e1kladov\u00fdm<\/strong> omezen\u00edm. T\u00edm vznik\u00e1 rozmanit\u011bj\u0161\u00ed nab\u00eddka konkuren\u010dn\u00edch produkt\u016f.<\/p>\n\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t

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Vlastnosti RISC-V<\/h2>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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Niewielki modu\u0142 oparty na architekturze RISC-V.<\/figcaption>\n\t\t\t\t\t\t\t\t\t\t<\/figure>\n\t\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t
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Procesory RISC-V<\/strong> se stejn\u011b jako ostatn\u00ed v\u00fdpo\u010detn\u00ed \u010dipy vyzna\u010duj\u00ed \u0159adou vlastnost\u00ed, kter\u00e9 z nich \u010din\u00ed zaj\u00edmavou a inovativn\u00ed alternativu ve sv\u011bt\u011b procesorov\u00e9 architektury. Jednou z kl\u00ed\u010dov\u00fdch vlastnost\u00ed je jejich v\u00fd\u0161e zm\u00edn\u011bn\u00e1 otev\u0159en\u00e1<\/strong> forma<\/strong>. Tento typ j\u00e1dra se nav\u00edc vyzna\u010duje modularitou<\/strong>. Tato architektura umo\u017e\u0148uje vytv\u00e1\u0159et vlastn\u00ed instruk\u010dn\u00ed sady, co\u017e d\u00e1v\u00e1 n\u00e1vrh\u00e1\u0159\u016fm mo\u017enost p\u0159izp\u016fsobit procesor konkr\u00e9tn\u00ed aplikaci. To znamen\u00e1, \u017ee nemus\u00edte “platit” za pokyny, kter\u00e9 nepou\u017e\u00edv\u00e1te, co\u017e se projev\u00ed v \u00faspo\u0159e zdroj\u016f a zv\u00fd\u0161en\u00ed efektivity.<\/p>\n\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t

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Dal\u0161\u00edm charakteristick\u00fdm znakem RISC-V je jednoduchost<\/strong> instrukc\u00ed<\/strong>. D\u00edky zam\u011b\u0159en\u00ed na mal\u00fd po\u010det jednoduch\u00fdch p\u0159\u00edkaz\u016f umo\u017e\u0148uj\u00ed procesory RISC-V rychl\u00e9 dek\u00f3dov\u00e1n\u00ed a prov\u00e1d\u011bn\u00ed n\u00e1sledn\u00fdch instrukc\u00ed, co\u017e vede k velmi dobr\u00e9mu v\u00fdkonu.<\/p>\n

Procesory RISC-V tak\u00e9 podporuj\u00ed modern\u00ed<\/strong> technologie,<\/strong> jako je instruk\u010dn\u00ed sada SIMD a pokro\u010dil\u00e9 mechanismy ochrany pam\u011bti. Stoj\u00ed za zm\u00ednku, \u017ee RISC-V nen\u00ed model omezen\u00fd na konkr\u00e9tn\u00ed oblast pou\u017eit\u00ed – od mikrokontrol\u00e9r\u016f po superpo\u010d\u00edta\u010de lze tuto architekturu pou\u017e\u00edt v \u0161irok\u00e9 \u0161k\u00e1le aplikac\u00ed.<\/p>\n

Stru\u010dn\u011b \u0159e\u010deno, procesory RISC-V se vyzna\u010duj\u00ed otev\u0159enost\u00ed, modularitou, jednoduchost\u00ed a v\u0161estrannost\u00ed<\/strong>. D\u00edky t\u011bmto vlastnostem architektura nejen p\u0159itahuje pozornost in\u017een\u00fdr\u016f a konstrukt\u00e9r\u016f, ale tak\u00e9 otev\u00edr\u00e1 dve\u0159e nov\u00fdm mo\u017enostem a inovac\u00edm v oblasti procesor\u016f.<\/p>\n\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t

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Sou\u010dasn\u00e9 pou\u017eit\u00ed RISC-V<\/h2>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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P\u0159esto\u017ee jsou \u010dipy RISC-V pom\u011brn\u011b mlad\u00e9 konstrukce, existuj\u00ed ji\u017e zaj\u00edmav\u00e9 a pou\u017e\u00edvan\u00e9 procesory, kter\u00e9 lze uv\u00e9st.<\/p>\n

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  • SiFive U54-MC Coreplex<\/strong> – Jedn\u00e1 se o 64bitov\u00fd procesor RISC-V ur\u010den\u00fd pro pou\u017eit\u00ed ve vysoce v\u00fdkonn\u00fdch aplikac\u00edch, jako je nap\u0159\u00edklad cloud computing. Podporuje roz\u0161\u00ed\u0159en\u00ed umo\u017e\u0148uj\u00edc\u00ed prov\u00e1d\u011bn\u00ed instrukc\u00ed celo\u010d\u00edseln\u00e9ho n\u00e1soben\u00ed a d\u011blen\u00ed a pracuje na frekvenci 1,5 GHz.<\/li>\n
  • Nvidia Grace<\/strong> – 64bitov\u00fd procesor RISC-V, kter\u00fd se pou\u017e\u00edv\u00e1 v datov\u00fdch centrech a vysoce v\u00fdkonn\u00fdch v\u00fdpo\u010detn\u00edch aplikac\u00edch. Tento syst\u00e9m podporuje operace s pohyblivou \u0159\u00e1dovou \u010d\u00e1rkou v jednoduch\u00e9 p\u0159esnosti a pravd\u011bpodobn\u011b bude pou\u017e\u00edv\u00e1n v budouc\u00edch superpo\u010d\u00edta\u010d\u00edch.<\/li>\n
  • Western Digital SweRV Core<\/strong> – je 32bitov\u00fd \u010dip RISC-V, ur\u010den\u00fd pro pou\u017eit\u00ed ve vestav\u011bn\u00fdch aplikac\u00edch a aplikac\u00edch internetu v\u011bc\u00ed, optimalizovan\u00fd z hlediska spot\u0159eby energie.<\/li>\n<\/ul>\n\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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    Budoucnost a ambice RISC-V<\/h2>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t
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    Ji\u017e nyn\u00ed lze \u0159\u00edci, \u017ee \u010dipy architektury RISC-V byly \u00fasp\u011b\u0161n\u00e9<\/strong>, proto\u017ee se jim poda\u0159ilo proniknout do hlavn\u00edho proudu a existovat vedle procesor\u016f x86 a ARM. S n\u00e1zory, \u017ee RISC-V brzy zcela ovl\u00e1dne trh s procesory, bych v\u0161ak byl opatrn\u00fd. Tyto typy jader jsou zaj\u00edmavou alternativou<\/strong>, zejm\u00e9na k \u010dip\u016fm ARM, a v budoucnu mohou p\u0159evz\u00edt \u010d\u00e1st spot\u0159ebitelsk\u00e9ho trhu, ale je t\u0159eba si uv\u011bdomit, \u017ee ARM m\u016f\u017ee mezit\u00edm obsadit velkou \u010d\u00e1st oblasti, kterou v sou\u010dasnosti okupuje x86, tedy dom\u00e1c\u00ed po\u010d\u00edta\u010de.<\/p>\n\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t

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    P\u0142ytka Maixduino wyposa\u017cona w dwurdzeniowy uk\u0142ad RISC-V.<\/figcaption>\n\t\t\t\t\t\t\t\t\t\t<\/figure>\n\t\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t
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    Podle m\u00e9ho n\u00e1zoru m\u016f\u017ee RISC-V existovat<\/strong> hned vedle ARM a x86 a \u010dipy zalo\u017een\u00e9 na t\u00e9to architektu\u0159e lze \u00fasp\u011b\u0161n\u011b pou\u017e\u00edvat v mnoha vestavn\u00fdch syst\u00e9mech a za\u0159\u00edzen\u00edch IoT.<\/p>\n

    Spole\u010dnost RISC-V International hled\u00ed do budoucnosti s optimismem<\/strong>. Na konci roku 2020 ozn\u00e1mili, \u017ee do roku 2025 by m\u011blo b\u00fdt na trhu t\u00e9m\u011b\u0159 80 milion\u016f<\/strong> \u010dip\u016f RISC-V, co\u017e by znamenalo 14%<\/strong> pod\u00edl na trhu. Tato vize je ambici\u00f3zn\u00ed a pravd\u011bpodobn\u011b bude fungovat, proto\u017ee segment procesorov\u00e9 architektury, kter\u00e9mu dominuj\u00ed dva velc\u00ed hr\u00e1\u010di, pot\u0159eboval n\u011bco otev\u0159en\u00e9ho<\/strong> a “zdarma”<\/strong>, co by mohly pou\u017e\u00edvat mal\u00e9 spole\u010dnosti a za\u010d\u00ednaj\u00edc\u00ed podniky. P\u0159esto je je\u0161t\u011b p\u0159\u00edli\u0161 brzy na to, abychom RISC-V p\u0159edpov\u00eddali budoucnost jako v\u00fdznamn\u00e9mu hr\u00e1\u010di na trhu, i kdy\u017e budoucnost samoz\u0159ejm\u011b vypad\u00e1 pest\u0159e.<\/p>\n

    Na z\u00e1v\u011br bych se r\u00e1d pod\u011blil o sv\u00e9 osobn\u00ed obavy ohledn\u011b budoucnosti architektury RISC-V. P\u016fvodn\u011b se p\u0159edpokl\u00e1dalo, \u017ee tento typ \u010dip\u016f bude kompatibiln\u00ed<\/strong>, tj. aplikace p\u0159ipraven\u00e1 pro jeden \u010dip RISC-V by m\u011bla bez probl\u00e9m\u016f b\u011b\u017eet na jin\u00e9m procesoru zalo\u017een\u00e9m na tomto modelu. Zpo\u010d\u00e1tku tomu tak bylo, ale s rostouc\u00ed oblibou jader RISC-V se za\u010daly objevovat dal\u0161\u00ed a dal\u0161\u00ed procesory, kter\u00e9, jak se uk\u00e1zalo, byly softwarov\u011b nekompatibiln\u00ed za sebou<\/strong>. D\u016fvodem tohoto stavu v\u011bc\u00ed je jedna z hlavn\u00edch v\u00fdhod RISC-V, toti\u017e otev\u0159enost a distribuce na z\u00e1klad\u011b open source z\u00e1sad. V budoucnu, a\u017e bude jader RISC-V je\u0161t\u011b v\u00edce, by to mohl b\u00fdt docela probl\u00e9m. Kolokvi\u00e1ln\u011b \u0159e\u010deno – ka\u017ed\u00fd bude d\u011blat, co se mu l\u00edb\u00ed, a v\u00fdsledkem toho bude spousta nekompatibiln\u00edch \u010dip\u016f s t\u00edm sam\u00fdm logem. Jin\u00fdmi slovy, zcela chyb\u00ed standardizace<\/strong>, co\u017e m\u016f\u017ee n\u00e1vrh\u00e1\u0159e hardwaru odradit od pou\u017e\u00edv\u00e1n\u00ed jader RISC-V. V sou\u010dasn\u00e9 dob\u011b se zd\u00e1, \u017ee RISC-V International nem\u00e1 v pl\u00e1nu “ukl\u00edzet”, mo\u017en\u00e1 \u010dek\u00e1, a\u017e se na trhu objev\u00ed jeden v\u011bt\u0161\u00ed v\u00fdrobce procesor\u016f s t\u00edmto j\u00e1drem, jeho\u017e produkty se po \u010dase stanou pr\u016fmyslov\u00fdm standardem a na zb\u00fdvaj\u00edc\u00ed nekompatibiln\u00ed n\u00e1vrhy se p\u0159irozen\u011b zapomene, ale co p\u0159inese budoucnost, uk\u00e1\u017ee \u010das.    <\/p>\n

    Zdroje:<\/p>\n

    https:\/\/www.xda-developers.com\/risc-v\/<\/p>\n

    https:\/\/www.digitaltrends.com\/computing\/what-is-risc-v\/<\/p>\n

    https:\/\/www2.eecs.berkeley.edu\/Pubs\/TechRpts\/2014\/EECS-2014-146.pdf<\/p>\n

    https:\/\/medium.com\/@sharjeelimtiazprof\/risc-v-history-introduction-60642a685fdd<\/p>\n

    https:\/\/www.allaboutcircuits.com\/technical-articles\/introductions-to-risc-v-instruction-set-understanding-this-open-instruction-set-architecture\/<\/p>\n

    https:\/\/www.elprocus.com\/risc-v-processor\/<\/p>\n

    https:\/\/five-embeddev.com\/riscv-isa-manual\/latest\/history.html<\/p>\n

    https:\/\/www.microcontrollertips.com\/risc-v-vs-arm-vs-x86-whats-the-difference\/<\/p>\n

    https:\/\/www.makeuseof.com\/risc-vs-arm-what-is-the-difference\/<\/p>\n

    https:\/\/www.hpcwire.com\/2022\/11\/18\/risc-v-is-far-from-being-an-alternative-to-x86-and-arm-in-hpc\/<\/p>\n

    https:\/\/en.wikipedia.org\/wiki\/RISC-V<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t<\/div>\n\t\t","protected":false},"excerpt":{"rendered":"

    V dne\u0161n\u00edm dynamick\u00e9m a neust\u00e1le se vyv\u00edjej\u00edc\u00edm sv\u011bt\u011b technologi\u00ed hraje architektura procesoru kl\u00ed\u010dovou roli. Po mnoho let tomuto trhu dominovaly technologick\u00e9 velmoci, konkr\u00e9tn\u011b x86 a ARM. Tyto architektury se d\u00edky sv\u00fdm jedine\u010dn\u00fdm vlastnostem staly z\u00e1kladem dne\u0161n\u00edho trhu, tak\u017ee procesory s t\u011bmito typy jader dnes najdeme ve v\u011bt\u0161in\u011b za\u0159\u00edzen\u00ed. <\/p>\n","protected":false},"author":34,"featured_media":68721,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[548,549,557],"tags":[],"class_list":["post-69172","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-elektronika-cs","category-kompendium-cs","category-zajimavosti"],"acf":[],"yoast_head":"\nPr\u016fvodce architekturou RISC-V - Botland<\/title>\n<meta name=\"description\" content=\"V dne\u0161n\u00edm dynamick\u00e9m a neust\u00e1le se vyv\u00edjej\u00edc\u00edm sv\u011bt\u011b technologi\u00ed hraje architektura procesoru kl\u00ed\u010dovou roli. Po mnoho let tomuto trhu dominovaly technologick\u00e9 velmoci, konkr\u00e9tn\u011b x86 a ARM. Tyto architektury se d\u00edky sv\u00fdm jedine\u010dn\u00fdm vlastnostem staly z\u00e1kladem dne\u0161n\u00edho trhu, tak\u017ee procesory s t\u011bmito typy jader dnes najdeme ve v\u011bt\u0161in\u011b za\u0159\u00edzen\u00ed.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/botland.cz\/blog\/pruvodce-architekturou-risc-v\/\" \/>\n<meta property=\"og:locale\" content=\"cs_CZ\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Pr\u016fvodce architekturou RISC-V - Botland\" \/>\n<meta property=\"og:description\" content=\"V dne\u0161n\u00edm dynamick\u00e9m a neust\u00e1le se vyv\u00edjej\u00edc\u00edm sv\u011bt\u011b technologi\u00ed hraje architektura procesoru kl\u00ed\u010dovou roli. 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